AMD launches its fourth generation of data center Epyc chips in the world. 5nm processors outperform the alternatives on the market by a large margin.
Dr. Lisa Su, CEO of AMD, launched the Epyc 9004 in San Francisco, and under this banner the company’s latest data center processors appear. The Epyc 9004, or Epyc Genoa for codename enthusiasts, is the best line of data center chips ever, according to Sue.
To undermine this claim, earlier today Intel introduced His Xeon Max chip from Sapphire Roads. Practically speaking, the launch doesn’t mean much and only concerns one product in the Sapphire Roads range, whose availability begins at an unspecified moment next year. Thus AMD maintains the momentum and has strong ambitions with Epyc Genoa.
big step
“This fourth generation of Epyc represents a huge step forward for our data center chips,” said Ram Bidiphutla, Vice President of Corportate Epyc Product Management. “That should be clear in the name, which is why we chose the 9000.” AMD is now using a file New naming convention for his chips, By analogy with AMD Ryzen.
What does this big step mean now? AMD Epyc 9004 is built around the Zen 4 core architecture and combines 5nm cores with 6nm I/O components. AMD also uses this strategy to Latest GPUs. The chips combine up to twelve chips for the first time with up to eight Zen 4 cores still on each chip. This means that AMD crams a maximum of 96 cores onto a single chip.
Moreover, these new chips support DDR5-4800 via 12 channels. The new capabilities require a different interface and a little more size, so it’s time for a new socket: SP5.
Energy efficiency is fundamental to the launch of new chips, whose performance-per-watt ratio, according to AMD itself, is about 2.6 times higher than the best Xeon chips that Intel offers today. The Xeon Max chip isn’t in the equation yet, but if we deduce Intel’s numbers, it certainly doesn’t sound any faster than the Epyc Genoa. Peddibhotla states that AMD chips simply outperform the current Intel family, delivering better performance for each individual core. Mike Clark, silicon design engineer at AMD and inventor of Zen architecture, explains the contributing factors.
Higher IPC, more cache
“Zen 4 is a derivative of Zen 3 with many improvements,” Clark said. “Our goal was to dramatically improve instructions per cycle (IPC) and achieve greater cache efficiency. Along the core front end, we have incorporated better industry predictions, which more efficiently and accurately predict future instructions so that a robust backend remains functional.”
On the back of the chip, the cache plays a major role. “We doubled our L2 cache from 512KB to 1MB without significantly increasing latency.” The results were impressive. Mark Papermaster, CTO & EVP Technology & Engineering explains: “IPC is up 14 percent compared to Zen 3.”
Additional Features
AMD is incorporating other improvements such as extensions to secret computerCapabilities with AES-256-XTS memory encryption and support for multiple host keys. New AVX-512 instructions continue to appear.
AMD launches a total of fourteen new processors that all have the same functionality. Think of 12 channels that support DDR5 with up to 6TB of memory, 128 PCIe 5 lanes, 63 lanes of CXL 1.1+, AVX-512 and of course multi-threading. Relates to the following treatments:
AMD Epic | nuclei | Clock speed (GHz base/boost) | TDP . Standard (w) | Minimum TDP (w) |
9654 / p | 96 | 2.40 / 3.70 | 360 | 320 – 400 |
9634 | 84 | 2.25 / 3.70 | 290 | 240 – 300 |
9554 / p | 64 | 3.10 / 3.75 | 360 | 320 – 400 |
9534 | 64 | 2.45 / 3.70 | 280 | 240 – 300 |
9474F | 48 | 3.60 / 4.10 | 360 | 320 – 400 |
9454 / p | 48 | 2.75 / 3.80 | 290 | 240 – 300 |
9374F | 32 | 3.85 / 4.30 | 320 | 320 – 400 |
9354 / p | 32 | 3.25 / 3.80 | 280 | 240 – 300 |
9334 | 32 | 2.70 / 3.90 | 210 | 200 – 240 |
9274F | 24 | 4.04 / 4.30 | 320 | 320 – 400 |
9254 | 24 | 2.90 / 4.15 | 200 | 200 – 240 |
9224 | 24 | 2.50 / 3.70 | 200 | 200 – 240 |
9174F | 16 | 4.10 / 4.40 | 320 | 320 – 400 |
9124 | 16 | 3.00 / 3.70 | 200 | 200 – 240 |
AMD refers to a large partner ecosystem and states that chips are immediately available. SuperMicro has a full suite ready, Lenovo provides 21 new servers, HPE provides it through GreenLake, Dell has servers ready, and in the cloud, Microsoft and Google have announced that instances will be available soon.
Peddibhotla summarizes “The chips are faster than any other alternative on the market, they consume less power and are more efficient.” The claims are based on our own criteria, but are historically very accurate. Overall, AMD comes with 2.5 times the competitor’s performance when comparing the best chips in the market.
Even Intel to provide an answer. The introduction of the Xeon Max doesn’t really reassure us in that regard, as this launch seems like a pre-emptive, panicky reaction to AMD’s announcement today. After all, it doesn’t match known availability, nor does it concern the entire range, but only two very specific specialized products with HBM memory on board, targeting HPC applications. At the most we can conclude that Intel won’t give up easily, but is looking forward to a more comprehensive countermove.
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